|• Technology •|
— FCS (CRC): Polynomial —
Frame Check Sequence (FCS) in High-level Data Link Control (HDLC) frame used for the Point-to-Point Protocol (PPP)
There are a 16-bit and a 32-bit Frame Check Sequence methods used in the High-level Link Control frame as used in the Point-to-Point Protocol. The 16-bit FCS is the default, 32-bit FCS can be negotiated between the participating devices. Here, the 16-bit FCS is discussed only, the 32-bit one can be infered from this discussion, however.
Note that the FCS is sometimes called CRC (Cyclic Redundancy Check) for other applications than HDLC and PPP. They function in the same way, although the generator polynomial may be different.
What makes it somewhat hard to understand the FCS is the fact that it was originally designed for a hardware implementation. The bits drip along the serial telephone line. To speed up a purely software implementation uses bytes instead of bits, a precalculated table is used.
This generator polynomial applies to CCITT X.25 and UIT V.41 as well.
x16 + x12 + x5 + 1
Here is the table for this polynomial copied from RFC 1662, page 19:
This table is available here as pure ascii-text files (2 KB) for
ready to copy into your source file.
© 2004 - 2017 by Horo Wernli.